[A06] CPU Undervolt and dynamic DDR frequency

The undervolt opp table is borrowed from rk3399-gru the google devicetree. Nothing dramatic, but undervolts most operating points compared to stock opp table.

Also enable the memory controller to dynamically schedule ddr memory frequencies. Stock is fixed 856MHz, now it supports 328MHz, 416MHz, 666MHz and 856MHz.
The scheduler is fine-tuned a bit so that it is more eager to scale up – stock version tends to almost always run at 328MHz, even under heavy load, which indeed has an impact on the performance – about 15% lower Geekbench scores.

After tuning, the statistics looks more healthy:

yatli@devterm /sys/class/devfreq/memory-controller % cat trans_stat
     From  :   To
           : 328000000 416000000 666000000 856000000   time(ms)
* 328000000:         0         0         0      2772  14605110
  416000000:       538         0         0       231    385320
  666000000:       508       164         0        63    376450
  856000000:      1727       605       735         0   1723200
Total transition : 7343

Tested, can feel the temperature going down.
Even performs better at Geekbench, possibly due to less thermal throttling: N/A - Geekbench Browser

Update: when undervolt meets suspend, need this patch: kernel: add suspend opp to prevent overvoltage · yatli/arch-linux-arm-clockworkpi-a06@d7f456b · GitHub
… otherwise rk808 may pass out (by jumping from undervolted 800mV to default 1000mV)


This is amazing!

What might be the chances that these changes find their way into the official CPi OS release?

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@guu nudge nudge ((

let me know if you wish to integrate and anything I can help.
I’d recommend do this after integrating rk miniloader, because upstream SPL only trains DDR for 400MHz/800MHz

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That’s very nice of you.
I am currently waiting for my CM4-R01 combo. And I am sure I will need help there :smile:


no doubt
definetily to integrate everything you have done for A06 currently in next release