No the DRM mode values are reasonable:
static const struct drm_display_mode default_mode = {
.clock = 54465,
.hdisplay = 480,
.hsync_start = 480 + 150,
.hsync_end = 480 + 150 + 24,
.htotal = 480 + 150 + 24 + 40,
.vdisplay = 1280,
.vsync_start = 1280 + 12,
.vsync_end = 1280 + 12+ 6,
.vtotal = 1280 + 12 + 6 + 10,
};
htotal = 694
vtotal = 1308
FPS = clock * 1000 / (htotal * vtotal)
(clock is in KHz)
FPS = 60.87, not perfect 60Hz, but close enough.
But that’s not what could make lines to be missing, and it is not like they are replicated at the bottom, so it is not a sync issue.
The problem is most likely in that code:
+static void cwd686_init_sequence(struct cwd686 *ctx)
{
struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
dcs_write_seq(0xF0,0x5A,0x5A);
dcs_write_seq(0xF1,0xA5,0xA5);
dcs_write_seq(0xB6,0x0D,0x0D);
dcs_write_seq(0xB4,0x0A,0x08,0x12,0x10,0x0E,0x0C,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x06);
dcs_write_seq(0xB3,0x0B,0x09,0x13,0x11,0x0F,0x0D,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x05,0x07);
dcs_write_seq(0xB0,0x54,0x32,0x23,0x45,0x44,0x44,0x44,0x44,0x90,0x01,0x90,0x01);
dcs_write_seq(0xB1,0x32,0x84,0x02,0x83,0x30,0x01,0x6B,0x01);
dcs_write_seq(0xB2,0x73);
dcs_write_seq(0xBD,0x4E,0x0E,0x50,0x50,0x26,0x1D,0x00,0x14,0x42,0x03);
dcs_write_seq(0xB7,0x01,0x01,0x09,0x11,0x0D,0x55,0x19,0x19,0x21,0x1D,0x00,0x00,0x00,0x00,0x02,0xFF,0x3C);
dcs_write_seq(0xB8,0x23,0x01,0x30,0x34,0x63);
dcs_write_seq(0xB9,0xA0,0x22,0x00,0x44);
dcs_write_seq(0xBA,0x12,0x63);
dcs_write_seq(0xC1,0x0C,0x16,0x04,0x0C,0x10,0x04);
dcs_write_seq(0xC2,0x11,0x41);
dcs_write_seq(0xC3,0x22,0x31,0x04);
dcs_write_seq(0xC7,0x05,0x23,0x6B,0x49,0x00);
dcs_write_seq(0xC5,0x00);
dcs_write_seq(0xD0,0x37,0xFF,0xFF);
dcs_write_seq(0xD2,0x63,0x0B,0x08,0x88);
dcs_write_seq(0xD3,0x01,0x00,0x00,0x01,0x01,0x37,0x25,0x38,0x31,0x06,0x07);
dcs_write_seq(0xC8,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06);//GAMMA2.2
dcs_write_seq(0xC6,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,0x00);
dcs_write_seq(0xF4,0x08,0x77);
dcs_write_seq(0x36,0x14);
dcs_write_seq(0x35,0x00);
dcs_write_seq(0xF1,0x5A,0x5A);
dcs_write_seq(0xF0,0xA5,0xA5);
}
And good luck to know what it does set. Well you may know if you find what driver the screen do use and the doc for them is public.